Samsung Electronics and SK Hynix are charting different paths in the next-generation memory market following high bandwidth memory (HBM). Samsung is pursuing a 'custom-tailored' strategy by directly stacking memory on customer artificial intelligence (AI) chips, while SK Hynix is focusing on establishing a 'shared standard' that multiple customers can utilize.
On August 5, the semiconductor industry reported that both companies unveiled their next-generation AI memory technologies at the 'FMS 2026' event in Santa Clara, California. Their technological directions for capturing market leadership post-HBM have become distinctly different.
Samsung's leading technology is zHBM. Unlike traditional HBM, which is placed beside AI accelerators, zHBM stacks memory vertically on top of the AI accelerator. This reduces the distance between the processor and memory, increasing data transfer speeds and reducing power consumption.
Samsung claims that zHBM can deliver up to eight times the performance of HBM5. It also boasts a power-to-performance ratio that is three times higher and can reduce thermal resistance by more than half. As AI models grow larger, data transfer bottlenecks become more pronounced, and Samsung's solution is to bring memory closer to the processor.
Custom design is also a key aspect. Samsung explained that it can incorporate customer-specific intellectual property (IP) into the interlayer between the memory and AI accelerator. This means the structure can be adjusted to meet the desired memory capacity, accelerator performance, and power conditions of the customer.
In NAND technology, Samsung emphasized its 3D strategy, unveiling the 10th generation V-NAND, known as V10 BV-NAND, which has over 400 layers. By applying wafer bonding technology, it has increased density by approximately 58% compared to the previous generation. The company also introduced zNAND-O for on-device AI.
In contrast, SK Hynix is focusing on standardization. Together with SanDisk, it unveiled the first standard specification for high bandwidth flash (HBF). HBF is a next-generation storage technology that, like HBM, allows for rapid data transfer while increasing capacity based on NAND.
HBF serves as a new layer between HBM and solid-state drives (SSDs). As AI inference becomes more widespread, data will accumulate more frequently. Relying solely on HBM would create capacity burdens, while SSDs alone would lack speed. SK Hynix aims to fill this gap with HBF.
The new specification is based on a maximum capacity of 512GB, with bandwidth divided into three tiers ranging from approximately 0.4TB to 3.0TB per second. It adopts the open chiplet interface UCIe for connections with processors, allowing for compatibility with various chips, including GPUs and CPUs.
SK Hynix also introduced its 10th generation 375-layer 4D NAND at FMS, which offers 2.5 times the power-to-performance ratio compared to the previous generation. The company plans to begin mass production of high-performance, high-capacity eSSDs based on this technology early next year.
A semiconductor industry insider noted, 'The post-HBM competition is a battle over who can dominate the AI system architecture rather than just product specifications. Samsung targets optimization for individual customers, while SK Hynix aims for an open ecosystem to address AI memory bottlenecks.'
* This article has been translated by AI.
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