SK Hynix has introduced next-generation optical interconnect technology aimed at addressing data bottlenecks between systems in AI data centers, moving beyond high-bandwidth memory (HBM). The focus is on transitioning data transmission between chips, racks, and pods to optical communication in massive AI infrastructures that connect thousands of GPUs and HBM.
On August 20, SK Hynix announced that it has published a research paper on Co-Packaged Optics (CPO) technology in the international journal Nature Electronics. The research involved collaboration with teams from the University of Virginia, the University of Illinois, Nanyang Technological University, MIT, and Yonsei University.
CPO technology integrates optical transceivers within the same package as processors. Traditional copper-based electrical connections suffer from increased signal loss and power consumption as data transmission distances and speeds increase. CPO minimizes the distance that high-speed electrical signals must travel by placing optical engines close to the processor and connecting the remaining distance with light.
The rapid increase in AI computational performance has led to data movement between systems becoming a new bottleneck. The paper highlights that while computational performance triples approximately every two years, interconnect bandwidth only increases by 1.4 times during the same period.
Recently, SK Hynix has expanded its business scope beyond HBM to include power, packaging, and connection technologies for AI data centers, responding to competition in system-level AI infrastructure.
The research team outlined a development path for CPO technology, extending from 2D packaging to 2.5D interposers and 3D heterogeneous integration. They also identified technical challenges for commercialization. The technical goals for next-generation AI infrastructure include achieving over 100 Tbps of bandwidth per node, energy consumption of less than 1 pJ/bit, and inter-chip latency of under 10 ns.
In the long term, the team proposed expanding optical connections to memory. The core concept is an 'optics-centric architecture' that directly connects computational resources and memory resources through optical interposers. This structure would allow multiple accelerators to share a large memory pool, enabling the scaling of AI models.
This paper is significant as it defines CPO not just as a single component technology but as a system technology that integrates memory, processors, and optical devices within a package. It also illustrates how SK Hynix is broadening its technological scope from HBM-centric memory competition to encompass the entire AI infrastructure.
* This article has been translated by AI.
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