SK hynix unveils 'iHBM' cooling tech to tackle AI chip heat

By Candice Kim Posted : May 26, 2026, 13:42 Updated : May 26, 2026, 13:42
A concept diagram of SK hynix's Integrated iHBM solution/ Courtesy of SK hynix

SEOUL, May 26 (AJP) - South Korean chipmaker SK hynix Inc. on Tuesday unveiled its "iHBM" (Integrated High Bandwidth Memory) technology, a memory solution incorporating Integrated Cooling Elements (ICE) directly into the High Bandwidth Memory (HBM) package to dramatically reduce heat and enhance the efficiency of overall AI systems.1

The company plans to apply the iHBM technology starting with its next-generation products, such as HBM5, to meet the stringent thermal management requirements of ultra-high integration and ultra-high bandwidth environments like High-Performance Computing (HPC) and AI data centers.

SK hynix developed iHBM to address rising heat issues as HBM performance advances through increased stacking and faster speeds to handle soaring AI processing demands. The technology structurally resolves this issue by placing a thermal control element (ICE) in the Die-to-Die Physical Layer (D2D PHY) area—where heat is most concentrated—creating a separate, dedicated "Heat Path".

This method, which contrasts with the traditional indirect approach of relying on the Core Die to expel heat, reduces thermal resistance by over 30 percent, ensuring stable operating characteristics even in high-temperature and high-load environments. ICE uses a silicon material with high thermal conductivity but no electrical conductivity to form the additional heat dissipation route inside the HBM package.

"iHBM is the optimal solution for minimizing heat generation, developed by combining memory design capability and advanced packaging technology," said Lee Kang-wook, Vice President of Package Development at SK hynix. He added that the company will "further solidify its AI memory leadership by preemptively providing the value customers need in the AI environment".

The solution also boasts strong advantages in manufacturability, utilizing the market-proven Advanced MR-MUF (Mass Reflow Molded Underfill) based WLP (Wafer Level Packaging) process for stable mass production. Furthermore, its high design compatibility with customers' existing SiP (System in Package) environments allows for immediate application without major design changes, substantially lowering the adoption burden for customers.

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